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authorShagun Agrawal <agrawalshagun07@gmail.com>2024-08-18 21:04:35 +0530
committerShagun Agrawal <agrawalshagun07@gmail.com>2024-08-18 21:04:35 +0530
commitf0b04ec099de12ae713e3a381d17b1af478f769a (patch)
tree69115c714e099454eb448dbe9cc2184bc59af4f2 /src/cljcc/emit.clj
parent702daa89c7f451f01933e659b59a4daaa01f10ab (diff)
Add bitwise operators
Pass chapter 3 bitwise operators
Diffstat (limited to 'src/cljcc/emit.clj')
-rw-r--r--src/cljcc/emit.clj10
1 files changed, 6 insertions, 4 deletions
diff --git a/src/cljcc/emit.clj b/src/cljcc/emit.clj
index d18edb3..2bce107 100644
--- a/src/cljcc/emit.clj
+++ b/src/cljcc/emit.clj
@@ -19,6 +19,8 @@
:dx "%edx"
:r10 "%r10d"
:r11 "%r11d"
+ :cx "%ecx"
+ :cl "%cl"
(throw (AssertionError. (str "Invalid register operand: " operand)))))
(def operand-emitters
@@ -104,8 +106,8 @@
instructions (map instruction-emit (:instructions f))]
(flatten [globl
name-line
- " pushq %rbp"
- " movq %rsp, %rbp"
+ " pushq %rbp"
+ " movq %rsp, %rbp"
instructions])))
(def emitters-top-level
@@ -122,8 +124,8 @@
(defn emit [ast]
(let [handle-os (fn [ast]
(if (= :linux (get-os))
- (conj (vec ast) linux-assembly-end)
- ast))]
+ (conj (conj (vec ast) linux-assembly-end) "\n")
+ (conj ast "\n")))]
(->> ast
(map emit-top-level)
concat